Physics 171/220 Course Organization and Syllabus

L. R. Fortney

revised 3/6/1997
© 1996-1999 L.R. Fortney



Physics 171/220 meets twice a week on Tuesday and Thursday and has a three hour lab one afternoon each week. By error the lab is offically scheduled for Friday, but it will be held on Tue, Wed, or Thur. depending on conflict resolution. The text for this course is Principles of Electronics, Analog and Digital. Since the course is once again down to a manageable size, I'll provide Xerox copies of labs and other documents. There's an errata for the text that you should use to correct the text.

You will have a lab most weeks as indicated below.

We will arrange starting times as needed: the labs will require about 3 hours to complete. The laboratory is in room 104.

The amount of time you need to spend in lab and the value you will get from that time is strongly dependent on your preparation. Most of the lab write-ups contain material that should be worked out in advance, both to speed the lab and to help explain the purpose of the lab. The labs are due at the end of the lab period each week.

The grade for this course will be determined as follows:

Three Exams 300 points total

Lab and homeowork grade 100 points

Final Exam 200 points

The assigned homework problems are due for class period following the day they are assigned. You are encouraged to ask questions in and out of class about those problems that present the most difficulties.

My office is Room 243, and my phone is 660-2580. I am generally available from 8-11:30 and 1:30 -4:00, but it's best to make an appointment first. You can also reach me via email. I'm rarely far from a computer screen during the day and will generally be able to respond quickly.

The Teaching Assistant for this course is Mr. Sean Spicer. He is also doing an independent study with me so will be available in the electronics lab room several afternoons each week. His email address is driver8@phy.duke.edu.



Syllabus for Physics 171/220


Book sections marked R in the table of contents are less important, but should still be read. Sections marked O are in general not relevant to this course and should be read only if specifically assigned.

You should read the assigned sections and make a first attempt at working the indicated problems before the date shown: the homework is due on Thursday of each week and will not be graded if turned in after Friday.

Jan 16
Sections 1.1 - 1.6
Course organization, DC circuits
Jan 21
1. Problems 1: 4, 9, 12, 13, 17, 18, 25
1. Problems 2: 3, 5, 7
Sections 1.7 - 1.8, 2.1-2.6
DC circuits, AC elements
Lab 1.1
Jan 23
2. Problems 2: 16, 17, 18, 20
Sections 2.7 - 2.9
impedance, resonance, networks
Jan 28
3. Problems 2: 21,23, 25, 26
Sections 2.10 -2.12
Bode plots, single term approx, equivalent
circuits, power
Lab 2.1
Jan 30
4. Problems 3: 1, 2, 4, 5, 7, 9, 10
Sections 3.1 - 3.6.4
signals, superposition, filters, Decibels, Bode plot, slopes, RC filters
Feb 4
5. Problems 3: 12, 13, 14, 16
Sections 3.7 - 3.9
s-plane, impulse response, filters
Lab 3.1
Feb 6
6. Problems 3: 21, 24, 27, 31
Sections 3.10 - 3.12.2
LCR filter, amplifiers, feedback
Feb 11
Exam 1 (Chapters 1 -3)
.
Lab 3.2
Feb 13
7. Problems 4: 1, 5, 8, 10
Sections 4.1 - 4.3
transformers
Feb 18
8. Problems 5: 1, 3, 5, 8, 9
Sections 5-1 - 5.4.5
PN junction, Zener diode
Lab 5.1
Feb 20
9. Problems 5: 10, 11, 12
Sections 5.5 - 5.5.4
diode applications, charge pump
Feb 25
10. Problems 5: 15
10. Problems 6: 1, 2, 3, 4, 5
Sections 6.1 - 6.2.6
bipolar transistor
Lab 5.2
Feb 27
11. Problems 6: 6, 8
Sections 6.3 - 6.3.6
CE Amp, Miller effect
March 4
12. Problems 6: 9, 10, 11
Sections 6.4 - 6.4.2, Apndx B
CC Amp
Lab 6.1
March 6
13. Problems 6: 16, 18, 19
Sections 6.6, 6.7, 6.8 - 6.8.4
PNP, current sources, JFET
March 11
Exam 2 (4-6.7)
. no lab
March 13
14. Problems 6: 20, 21, 23
Sections 6.9 - 6.9.2
JFET common source amp
!!! Spring Break !!!
March 15 - 23 .
March 25
15. Problems 7: 1, 6, 8, 9, 13
Sections 7.1 - 7.8
Darlington, cascode amplifers, current mirror
Lab 6.2
March 27
16. Problems 7: 17, 19, 24, 25
Sections 7.9- 7.10.2
differential, push-pull, totem pole amplifiers; operational amplifiers
April 1
17. Problems 8: 1, 2, 3, 6, 8
Sections 8.1 - 8.3.5 ideal op amp
open/closed loop gain
Lab 8.1
April 3
18. Problems 8: 13, 15, 16, 21, 29
Sections 8.3.6 - 8.3.8, 8.3.10 - 8.3.14
ideal operational amplifier applications
April 8
19. Problems 8: 23, 25, 26, 28
Sections 8.4 - 8.6
finite open-loop gain, oscillations, pole-zero analysis
Lab 8.2
April 10
20. Problems 9: 1, 3, 5, 7
Sections 8.6
Sections 9.1 - 9.4.1
more pole-zero analysis, digital: switches, bases, Boolean algebra
April 15
Exam 3 (Chapter 7-8)
.
Lab 8.3
April 17
21. Problems 9: 8, 11, 12, 13
Sections 9.5 - 9.6.6
gates, combinational logic design
April 20
22. Problems 9: 16, 17, 19, 20
Sections 9.6.7 - 9.9.1, 9.10 - 9.12.2
Karnaugh map, devices, flip-flops
Lab 9.1
April 24
23. Problems 9: 21, 22, 24
Sections 9.13 - 9.16
clocked flip-flops, state diagrams
April 29
24. Problems 9: 25, 27
Sections 9.17 - 9.17.4
registers, review
no lab
May 8

2 - 5 pm

Final Exam